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Deliang Fan

Energy Efficient Deep Neural Network Processing-In-MRAM: From Device to Algorithm

Deliang Fan, Assistant Professor at Arizona State University

Abstract:
In-memory computing is becoming a promising solution to reduce massive power hungry data traffic between computing and memory units, leading to significant improvement of entire system performance and energy efficiency. Emerging spintronic device based non-volatile Magnetic RAM (MRAM) has been a next-generation high performance non-volatile memory candidate due to its non-volatility, zero leakage power in un-accessed bit-cell, high integration density, excellent endurance and compatibility with CMOS fabrication technology. In this talk, Dr. Deliang Fan will present his recent research in leveraging innovations from both post-CMOS non-volatile MRAM technology and in-memory logic circuit & architecture to intrinsically integrate memory and processing units, targeting to advance next-generation revolutionary deep neural network processing-in-MRAM paradigm, and to achieve orders higher performance and ultra-low energy consumption compared with traditional computing platforms. Such new intelligent and energy efficient processing-in-MRAM platform is also demonstrated to be able to efficiently accelerate many data/compute-intensive applications, including data encryption, image/graph processing, etc.

Biography:
Dr. Deliang Fan is is currently an Assistant Professor in the School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ, USA. Before joining ASU in 2019, he was an assistant professor in Department of Electrical and Computer Engineering at University of Central Florida, Orlando, FL, USA. He received his M.S. and Ph.D. degrees, under the supervision of Prof. Kaushik Roy, in Electrical and Computer Engineering from Purdue University, West Lafayette, IN, USA, in 2012 and 2015, respectively. He received his B.S. degree in Electronic Information Engineering from Zhejiang University, Hangzhou, China, in 2010. 

Dr. Fan’s primary research interests include Energy Efficient and High Performance Big Data Processing-In-Memory Circuit, Architecture and Algorithm, with applications in Deep Neural Network, Data Encryption, Graph Processing and Bioinformatics Acceleration-in-Memory system; Brain-inspired (Neuromorphic) and Boolean Computing Using Emerging Nanoscale Devices like Spintronics and Memristors; security of AI system. He has authored and co-authored around 80+ peer-reviewed international journal/conference papers. He is the receipt of best paper award of 2019 ACM Great Lakes Symposium on VLSI, 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), and 2017 IEEE ISVLSI. His research paper was also nominated as best paper candidate of 2019 Asia and South Pacific Design Automation Conference. His research group is funded by National Science Foundation (NSF), Semiconductor Research Corporation (SRC), Cyber Florida, SCEEE Research Initiation grant, NanoScience Technology Center at UCF seed grant and UCF InHouse grant, etc. He served as technical reviewers for over 30 international journals/conferences, such as Nature Electronics, IEEE TNNLS, TVLSI, TCAD, TNANO, TC, TCAS, ISCAS, ISLPED, etc. He also served as the Technical Program Committee member of DAC, ICCAD, GLSVLSI, ISVLSI, ASP-DAC, ISQED, etc. He is also the technical area chair of GLSVLSI 2019, ISQED 2019/2020, and the financial chair of ISVLSI 2019.